IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2016


Article Details
Title: Criticality- and Requirement-Aware Bus Arbitration for Multi-Core Mixed Criticality Systems
Article URLs:
Alternative Article URLs:
Authors: Mohamed Hassan
  • University of Waterloo, Electrical and Computer Engineering
Hiren D. Patel
  • University of Waterloo, Electrical and Computer Engineering
Sharing: Unknown
Verification: Authors have not verified information
Artifact Evaluation Badge: none
Artifact URLs:
Artifact Correspondence Email Addresses:
NSF Award Numbers:
DBLP Key: conf/rtas/HassanP16
Author Comments:

Discuss this paper and its artifacts below