IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2016


Article Details
Title: Symbolic Buffer Sizing for Throughput-Optimal Scheduling of Dataflow Graphs
Article URLs:
Alternative Article URLs:
Authors: Adnan Bouakaz
  • INRIA
  • Univ. Grenoble Alpes
Pascal Fradet
  • INRIA
  • Univ. Grenoble Alpes
Alain Girault
  • INRIA
  • Univ. Grenoble Alpes
Sharing: Unknown
Verification: Authors have not verified information
Artifact Evaluation Badge: none
Artifact URLs:
Artifact Correspondence Email Addresses:
NSF Award Numbers:
DBLP Key: conf/rtas/BouakazFG16
Author Comments:

Discuss this paper and its artifacts below