Unlocking efficiency and scalability of reversible logic synthesis using conventional logic synthesis

Article Details
Title:	Unlocking efficiency and scalability of reversible logic synthesis using conventional logic synthesis
Article URLs:	https://doi.org/10.1145/2897937.2898107
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Authors:	Mathias Soeken	EPFL, Switzerland
Authors:	Anupam Chattopadhyay	Nanyang Technological University, Singapore
Sharing:	Unknown
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Artifact Evaluation Badge:	none
Artifact URLs:	http://github.com/msoeken/cirkit
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DBLP Key:	conf/dac/SoekenC16
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Design Automation Conference, DAC 2016