Title: |
Physics-based full-chip TDDB assessment for BEOL interconnects |
Article URLs: |
|
Alternative Article URLs: |
|
Authors: |
Xin Huang |
-
University of California, Riverside, CA 92521, USA, Department of Electrical Engineering
|
Valeriy Sukharev |
-
Mentor Graphics Corporation, Fremont, CA 94538, USA, Design to Silicon, Calibre
|
Zhongdong Qi |
-
University of California, Riverside, CA 92521, USA, Department of Electrical Engineering
|
Taeyoung Kim |
-
University of California, Riverside, CA 92521, USA, Department of Computer Science and Engineering
|
Sheldon X.-D. Tan |
-
University of California, Riverside, CA 92521, USA, Department of Electrical Engineering
|
Sharing: |
Not able to share produced artifacts
|
Verification: |
Authors have
verified
information
|
Artifact Evaluation Badge: |
none
|
Artifact URLs: |
|
Artifact Correspondence Email Addresses: |
|
NSF Award Numbers: |
1527324,
1255899
|
DBLP Key: |
conf/dac/HuangSQKT16
|
Author Comments: |
This paper has described a preliminary version of the commercial grade tool-prototype. |