| Title: |
Bolt: A Stateful Processor Interconnect |
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| Authors: |
Felix Sutton |
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ETH Zurich, Switzerland, Computer Engineering and Networks Laboratory
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| Marco Zimmerling |
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ETH Zurich, Switzerland, Computer Engineering and Networks Laboratory
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| Reto Da Forno |
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ETH Zurich, Switzerland, Computer Engineering and Networks Laboratory
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| Roman Lim |
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ETH Zurich, Switzerland, Computer Engineering and Networks Laboratory
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| Tonio Gsell |
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ETH Zurich, Switzerland, Computer Engineering and Networks Laboratory
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| Georgia Giannopoulou |
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ETH Zurich, Switzerland, Computer Engineering and Networks Laboratory
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| Federico Ferrari |
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ETH Zurich, Switzerland, Computer Engineering and Networks Laboratory
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| Jan Beutel |
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ETH Zurich, Switzerland, Computer Engineering and Networks Laboratory
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| Lothar Thiele |
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ETH Zurich, Switzerland, Computer Engineering and Networks Laboratory
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| Sharing: |
Unknown
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| Verification: |
Authors have
not verified
information
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| Artifact Evaluation Badge: |
none
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| NSF Award Numbers: |
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| DBLP Key: |
conf/sensys/SuttonZFLGGFBT15
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| Author Comments: |
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