Fault simulation for analog test coverage

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Title:	Fault simulation for analog test coverage
Article URLs:	https://doi.org/10.1109/TEST.2016.7805831
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Authors:	Jyotsna Sequeira	Intel Corporation
	Suriyaprakash Natarajan	Intel Corporation
	Prashant Goteti	Intel Corporation
	Nitin Chaudhary	Intel Corporation
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DBLP Key:	conf/itc/SequeiraNGC16
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IEEE International Test Conference, ITC 2016