| Article Details | ||
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| Title: | A 32nm, 0.65-10GHz, 0.9/0.3 ps/σ TX/RX jitter single inductor digital fractional-n clock generator for reconfigurable serial I/O | |
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| Authors: | William Y. Li |
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| Hyung Seok Kim |
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| Kailash Chandrashekar |
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| Khoa Minh Nguyen |
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| Ashoke Ravi |
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| Sharing: | Unknown | |
| Verification: | Authors have not verified information | |
| Artifact Evaluation Badge: | none | |
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| DBLP Key: | conf/islped/LiKCNR17 | |
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