| Title: |
A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops |
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| Authors: |
Giuseppe Natale |
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Politecnico di Milano, DEIB
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| Giulio Stramondo |
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Politecnico di Milano, DEIB
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University of Amsterdam
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| Pietro Bressana |
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Politecnico di Milano, DEIB
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| Riccardo Cattaneo |
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Politecnico di Milano, DEIB
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| Donatella Sciuto |
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Politecnico di Milano, DEIB
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| Marco D. Santambrogio |
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Politecnico di Milano, DEIB
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| Sharing: |
Unknown
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| Verification: |
Authors have
not verified
information
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| Artifact Evaluation Badge: |
none
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| DBLP Key: |
conf/iccad/NataleSBCSS16
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| Author Comments: |
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