| Title: |
Timing Driven Incremental Multi-Bit Register Composition Using a Placement-Aware ILP formulation |
| Article URLs: |
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| Alternative Article URLs: |
https://ieeexplore.ieee.org/document/8403252 |
| Authors: |
Ioannis Seitanidis |
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Democritus University of Thrace, ECE Dept
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| Giorgos Dimitrakopoulos |
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Democritus University of Thrace, ECE Dept
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| Pavlos M. Mattheakis |
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Mentor, A Siemens Business
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| Laurent Masse-Navette |
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Mentor, A Siemens Business
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| David G. Chinnery |
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Mentor, A Siemens Business
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none
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| NSF Award Numbers: |
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| DBLP Key: |
conf/dac/SeitanidisDMMC17
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| Author Comments: |
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