| Article Details | ||
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| Title: | Reduced Hardware NOrec: A Safe and Scalable Hybrid Transactional Memory | |
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| Authors: | Alexander Matveev |
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| Nir Shavit |
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| Sharing: | Unknown | |
| Verification: | Authors have not verified information | |
| Artifact Evaluation Badge: | none | |
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| NSF Award Numbers: | 1217921, 1301926, 1447786 | |
| DBLP Key: | conf/asplos/MatveevS15 | |
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