| Title: |
PATS: pattern aware scheduling and power gating for GPGPUs |
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| Authors: |
Qiumin Xu |
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University of Southern California, Ming Hsieh Department of Electrical Engineering
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| Murali Annavaram |
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University of Southern California, Ming Hsieh Department of Electrical Engineering
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| Sharing: |
Unknown
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| Verification: |
Authors have
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| Artifact Evaluation Badge: |
none
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| NSF Award Numbers: |
0954211
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| DBLP Key: |
conf/IEEEpact/XuA14
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| Author Comments: |
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